1. Field of the Invention
The present invention relates to a system-in-package type semiconductor device incorporating a capsule type semiconductor package.
2. Related Art
For purposes of functional improvement, downsizing and system development of a conventional semiconductor device, a multi-chip package is employed particularly for a memory product type, in which multiple IC chips are perpendicularly laminated and this laminated stack is directly mounted on an interposer substrate using wire bonding. (see for example, Japanese Unexamined Patent Publication No. 2002-231885, and Japanese Unexamined Patent Publication No. 2002-217367).
According to the conventional technological method as above, test of electric characteristics is conducted after completion of assembly of multiple chips, so that defective products are sometimes found later, and a reduction in their manufacturing costs is difficult. Furthermore, the internal arrangement of wiring is not much free and a multi-layer interposer substrate is required. This results in increases in substrate costs and package size, and the package becomes bulky.
The present invention has been made to solve these problems. According to the present invention, a capsule type semiconductor package, that has been tested and encapsulated in advance, is connected to another semiconductor chip such as a functioning logic chip. As a result, chips having different functions can be combined to cooperate with each other, and system development can be easily accomplished.